Radar Digital Signal Processing Goes Floating Point
For the longest time, radar applications deployed DSPs featuring fixed point arithmetic, as floating point operations were considered to be inferior in terms of performance, power efficiency and area (PPA), which is critical for any embedded system.
Yet there has always been a desire to move to floating point arithmetic, as it allows for a larger dynamic range as required by the latest radar systems, achieving the required signal to noise ratio (SNR). This presentation will cover a detailed floating point / fixed point tradeoff analysis, featuring radar use cases.
It will also discuss the growing interest in AI enhanced radar algorithms, and how these can be enabled using a vector DSP, either standalone or combined with a tightly coupled AI accelerator. Specific focus will be given to the programming flow featuring support for TensorFlow, Caffe or ONNX.
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Senior Product Manager