About this Session
The availability of low-cost LiDAR solutions is essential in autonomous vehicles of level 3+. Solid-state LiDAR will need highly sensitive detector arrays with excellent time resolution. CMOS integrated SPAD arrays are the most promising candidates for low-cost solutions.
Today, a major drawback of SPAD based sensor arrays is the large pixel size mainly caused by complex pixel electronics which also reduces the fill factor. To overcome this weakness the stacking of SPAD array and electronics has been proposed earlier. Both, chip-to wafer and wafer-to-wafer technologies have been shown so far. In this presentation we demonstrate a novel 3D wafer stacking process with 200mm wafers. The BSI process features direct wafer bonding, backside thinning and in-pixel fine-pitch electrical connection with new TSµV (through silicon micro vias). First BSI SPAD detectors have been fabricated and successfully tested.