Software Defined Vehicle Architectures centralize the implementations of low latency control algorithms as well ADAS features in a high-performance Central Compute Unit. Centralization leads to longer data paths and increases end-to-end latency on paths between sensors, the Central Compute Unit, and actuators with multiple time-consuming handovers between software tasks and hardware components. We introduce ARDMA developed by General Motors Research and Development and inspired by techniques used in Data Centers as a way for minimizing the end-to-end latency of control traffic and we show how ADAS sensor applications can benefit from this technology. Our ARDMA implementation in hardware on an FPGA demonstrates significant reductions in latency and computational overhead when compared to more traditional implementations and architectures.